In der Tat.16-Bit schrieb:Wir werden also in Zukunft über Speichermenge und Anbindung des Speichers reden als über Prozessoren.
Die Zukunft heißt hardware accelerated BVH construction within GPU.
Siehe auch https://blog.imaginationtech.com/in...vels-system-and-what-it-will-mean-for-gaming/
Und aus einem reddit post:
From what I gathered from Microsoft, Khronos Groups, and NVIDIA’s white paper and DXR/Vulkan RT documents, CPU aren’t primary responsible for building BVH structure. Only Vulkan seems to support offloading building of top-level acceleration structure to CPU and this isn’t the default behavior.
BVH structure building need access to geometry data each frame to decide whether 1. the scene had changed too much and need a complete rebuild, or 2. they can reuse and modify existing data to save an order of magnitude of compute resource at the cost of degrading quality.
DXR acceleration structures typically get built at runtime on the GPU and contain two levels: a bottom and a top level.
Bottom-level acceleration structures (BLAS) contain geometric or procedural primitives. Top-level acceleration structures (TLAS) contain one or more bottom-level structures. This allows geometry instancing by inserting the same BLAS into the TLAS multiple times, each with different transformation matrices. Bottom-level structures are slower to build but deliver fast ray intersection. Top-level structures are fast to build, improving flexibility and reusability of geometry, but overuse can reduce performance. For best performance, bottom-level structures should overlap as little as possible.
NVIDIA recommend building DXR acceleration structure (which currently base on BVH) with async compute functions of their GPU to hide the cost associated. The acceleration structure was then stored to graphic memory for RT core to use.- Introduction to DirectX Raytracing, NVIDIA
Khronos’s blog post about Vulkan Ray Tracing does mentioned the task of generating top level acceleration structure can be done with either GPU or CPU. This is one of the additional features Vulkan have over DXR. Developers can choose to offload this part of the task to CPU if there are idle resources there to spare. If bandwidth/ latency between CPU and GPU ever becomes a concern developers can just choose to not to enable this function.
Anyway, a bit off topic regrading direction of BVH construction for future GPU ray tracing implementation. The roles of which CPU or the interlinking between CPU and GPU had played will become even less significant. Most major GPU makers are moving toward hardware accelerated BVH construction within GPU.
- Imagination Technology (who most famously licensing GPU patents/ designs to Apple) had demonstrated their Wizard architecture in GDC 2014 (video) with dedicated hardware called “SHG” for BVH construction. They mentioned this again in their recent white paper about six levels of ray tracing. They are planning to release updated ray tracing capable C-Series design later this year. A company called Innosilicon are building desktop GPU with last year’s Imagination’s B-Series design. If this collaboration actually materialize into anything. We might have a new player on the market, or maybe Apple will leverage their renewed licensing agreement last year and finally put ray tracing into Apple Silicon.
- NVIDIA made a presentation in SIGGRAPH 2019 about future improvements of their ray tracing tech (video, slides). They compared various prototypes of hardware accelerated BVH construction methods from their previous research, and the video memory bandwidth saving advantages of their latest PLOCTree architecture. NVIDIA hired the team that wrote the PLOCTree paper who are also making this presentation.
- Intel submitted their own patent for hardware accelerated BVH construction array which was approved in Nov 2020. Intel already confirmed their upcoming gaming HPG lineup will have ray tracing hardware which is very aggressive for a newcomer of discrete graphic. There is good possibility that this patent will become part of their future roadmap.