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The information comes from the author of the DRAM Calculator for Ryzen processors
1usmus or Yuri Bubliy. He has mentioned on his Twitter feed that the maximum value of the frequency of the AMD Zen 2 generation of processors or Ryzen 3000 series is 5000 MHz and the UCLK is half of that so it should be set at 1250 MHz effective. The difference between the memory clock and UCLK is that the memory clock is specific only to the internal and external memory clock while the UMC clock is specific to the unified memory controller. Following is a set of clock domains for Zen based Ryzen CPUs (
via WikiChip):
- UClk – UMC Clock – The frequency at which the Unified Memory Controller’s (UMC) operates at. This frequency is identical to MemClk.
- LClk – Link Clock – The clock at which the I/O Hub Controller communicates with the chip.
- FClk – Fabric Clock – The clock at which the data fabric operates at. This frequency is identical to MemClk.
- MemClk – Memory Clock – Internal and external memory clock.
- CClk – Core Clock – The frequency at which the CPU core and the caches operate at (i.e. advertised frequency).
I think it's time to start
The maximum value of the frequency of RAM Zen 2 generation is 5000 MHz mode UCLK == MEMCLK / 2.
🙂
— Юрий (@1usmus)
Now as a reference, the Ryzen 7 1700 had a core clock of 3000 MHz with 2400 MT/s memory and a UClk of 1200 MHz (600 MHz effective). Now the one thing to consider is that the Infinity Fabric clock is also tied to the memory clock and since Infinity Fabric cannot hit 5000 MHz, it will actually run at half the speed of the memory clock.
Now one thing to consider is while up to 5000 MHz is the maximum speed that can be achieved on the upcoming generation of Ryzen processors, not all CPUs may be able to hit those speeds. There are still some things to consider as currently, 2nd Generation Ryzen processors have a max speed of 4000 MHz listed but they can’t reach those speeds. Only overclockers might be able to hit the 5 GHz memory speed limits using LN2 but from a consumer perspective, these speeds may be far from reachable.
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